1 /*
2 * ac97.h
3 *
4 * definitions for the AC97, Intel's Audio Codec 97 Spec
5 * also includes support for a generic AC97 interface
6 */
7
8 #ifndef _AC97_H_
9 #define _AC97_H_
10 #include "sound_config.h"
11 #include "sound_calls.h"
12
13 #define AC97_RESET 0x0000 //
14 #define AC97_MASTER_VOL_STEREO 0x0002 // Line Out
15 #define AC97_HEADPHONE_VOL 0x0004 //
16 #define AC97_MASTER_VOL_MONO 0x0006 // TAD Output
17 #define AC97_MASTER_TONE 0x0008 //
18 #define AC97_PCBEEP_VOL 0x000a // none
19 #define AC97_PHONE_VOL 0x000c // TAD Input (mono)
20 #define AC97_MIC_VOL 0x000e // MIC Input (mono)
21 #define AC97_LINEIN_VOL 0x0010 // Line Input (stereo)
22 #define AC97_CD_VOL 0x0012 // CD Input (stereo)
23 #define AC97_VIDEO_VOL 0x0014 // none
24 #define AC97_AUX_VOL 0x0016 // Aux Input (stereo)
25 #define AC97_PCMOUT_VOL 0x0018 // Wave Output (stereo)
26 #define AC97_RECORD_SELECT 0x001a //
27 #define AC97_RECORD_GAIN 0x001c
28 #define AC97_RECORD_GAIN_MIC 0x001e
29 #define AC97_GENERAL_PURPOSE 0x0020
30 #define AC97_3D_CONTROL 0x0022
31 #define AC97_MODEM_RATE 0x0024
32 #define AC97_POWER_CONTROL 0x0026
33
34 /* registers 0x0028 - 0x0058 are reserved */
35
36 /* AC'97 2.0 */
37 #define AC97_EXTENDED_ID 0x0028 /* Extended Audio ID */
38 #define AC97_EXTENDED_STATUS 0x002A /* Extended Audio Status */
39 #define AC97_PCM_FRONT_DAC_RATE 0x002C /* PCM Front DAC Rate */
40 #define AC97_PCM_SURR_DAC_RATE 0x002E /* PCM Surround DAC Rate */
41 #define AC97_PCM_LFE_DAC_RATE 0x0030 /* PCM LFE DAC Rate */
42 #define AC97_PCM_LR_ADC_RATE 0x0032 /* PCM LR DAC Rate */
43 #define AC97_PCM_MIC_ADC_RATE 0x0034 /* PCM MIC ADC Rate */
44 #define AC97_CENTER_LFE_MASTER 0x0036 /* Center + LFE Master Volume */
45 #define AC97_SURROUND_MASTER 0x0038 /* Surround (Rear) Master Volume */
46 #define AC97_RESERVED_3A 0x003A /* Reserved */
47 /* range 0x3c-0x58 - MODEM */
48
49 /* registers 0x005a - 0x007a are vendor reserved */
50
51 #define AC97_VENDOR_ID1 0x007c
52 #define AC97_VENDOR_ID2 0x007e
53
54 /* volume control bit defines */
55
56 #define AC97_MUTE 0x8000
57 #define AC97_MICBOOST 0x0040
58 #define AC97_LEFTVOL 0x3f00
59 #define AC97_RIGHTVOL 0x003f
60
61 /* record mux defines */
62
63 #define AC97_RECMUX_MIC 0x0000
64 #define AC97_RECMUX_CD 0x0101
65 #define AC97_RECMUX_VIDEO 0x0202 /* not used */
66 #define AC97_RECMUX_AUX 0x0303
67 #define AC97_RECMUX_LINE 0x0404
68 #define AC97_RECMUX_STEREO_MIX 0x0505
69 #define AC97_RECMUX_MONO_MIX 0x0606
70 #define AC97_RECMUX_PHONE 0x0707
71
72
73 /* general purpose register bit defines */
74
75 #define AC97_GP_LPBK 0x0080 /* Loopback mode */
76 #define AC97_GP_MS 0x0100 /* Mic Select 0=Mic1, 1=Mic2 */
77 #define AC97_GP_MIX 0x0200 /* Mono output select 0=Mix, 1=Mic */
78 #define AC97_GP_RLBK 0x0400 /* Remote Loopback - Modem line codec */
79 #define AC97_GP_LLBK 0x0800 /* Local Loopback - Modem Line codec */
80 #define AC97_GP_LD 0x1000 /* Loudness 1=on */
81 #define AC97_GP_3D 0x2000 /* 3D Enhancement 1=on */
82 #define AC97_GP_ST 0x4000 /* Stereo Enhancement 1=on */
83 #define AC97_GP_POP 0x8000 /* Pcm Out Path, 0=pre 3D, 1=post 3D */
84
85
86 /* powerdown control and status bit defines */
87
88 /* status */
89 #define AC97_PWR_MDM 0x0010 /* Modem section ready */
90 #define AC97_PWR_REF 0x0008 /* Vref nominal */
91 #define AC97_PWR_ANL 0x0004 /* Analog section ready */
92 #define AC97_PWR_DAC 0x0002 /* DAC section ready */
93 #define AC97_PWR_ADC 0x0001 /* ADC section ready */
94
95 /* control */
96 #define AC97_PWR_PR0 0x0100 /* ADC and Mux powerdown */
97 #define AC97_PWR_PR1 0x0200 /* DAC powerdown */
98 #define AC97_PWR_PR2 0x0400 /* Output mixer powerdown (Vref on) */
99 #define AC97_PWR_PR3 0x0800 /* Output mixer powerdown (Vref off) */
100 #define AC97_PWR_PR4 0x1000 /* AC-link powerdown */
101 #define AC97_PWR_PR5 0x2000 /* Internal Clk disable */
102 #define AC97_PWR_PR6 0x4000 /* HP amp powerdown */
103 #define AC97_PWR_PR7 0x8000 /* Modem off - if supported */
104
105 /* useful power states */
106 #define AC97_PWR_D0 0x0000 /* everything on */
107 #define AC97_PWR_D1 AC97_PWR_PR0|AC97_PWR_PR1|AC97_PWR_PR4
108 #define AC97_PWR_D2 AC97_PWR_PR0|AC97_PWR_PR1|AC97_PWR_PR2|AC97_PWR_PR3|AC97_PWR_PR4
109 #define AC97_PWR_D3 AC97_PWR_PR0|AC97_PWR_PR1|AC97_PWR_PR2|AC97_PWR_PR3|AC97_PWR_PR4
110 #define AC97_PWR_ANLOFF AC97_PWR_PR2|AC97_PWR_PR3 /* analog section off */
111
112 /* Total number of defined registers. */
113 #define AC97_REG_CNT 64
114
115 /* Generic AC97 mixer interface. */
116
117 /* Structure describing access to the hardware. */
118 struct ac97_hwint
119 {
120 /* Perform any hardware-specific reset and initialization. Returns
121 0 on success, or a negative error code. */
122 int (*reset_device) (struct ac97_hwint *dev);
123
124 /* Returns the contents of the specified register REG. The caller
125 should check to see if the desired contents are available in
126 the cache first, if applicable. Returns a positive unsigned value
127 representing the contents of the register, or a negative error
128 code. */
129 int (*read_reg) (struct ac97_hwint *dev, u8 reg);
130
131 /* Writes VALUE to register REG. Returns 0 on success, or a
132 negative error code. */
133 int (*write_reg) (struct ac97_hwint *dev, u8 reg, u16 value);
134
135 /* Hardware-specific information. */
136 void *driver_private;
137
138 /* Three OSS masks. */
139 int mixer_devmask;
140 int mixer_stereomask;
141 int mixer_recmask;
142
143 /* The mixer cache. The indices correspond to the AC97 hardware register
144 number / 2, since the register numbers are always an even number.
145
146 Unknown values are set to -1; unsupported registers contain a
147 -2. */
148 int last_written_mixer_values[AC97_REG_CNT];
149
150 /* A cache of values written via OSS; we need these so we can return
151 the values originally written by the user.
152
153 Why the original user values? Because the real-world hardware
154 has less precision, and some existing applications assume that
155 they will get back the exact value that they wrote (aumix).
156
157 A -1 value indicates that no value has been written to this mixer
158 channel via OSS. */
159 int last_written_OSS_values[SOUND_MIXER_NRDEVICES];
160 };
161
162 /* Values stored in the register cache. */
163 #define AC97_REGVAL_UNKNOWN -1
164 #define AC97_REG_UNSUPPORTED -2
165
166 struct ac97_mixer_value_list
167 {
168 /* Mixer channel to set. List is terminated by a value of -1. */
169 int oss_channel;
170 /* The scaled value to set it to; values generally range from 0-100. */
171 union {
172 struct {
173 u8 left, right;
174 } stereo;
175 u8 mono;
176 } value;
177 };
178
179 /* Initialize the ac97 mixer by resetting it. */
180 extern int ac97_init (struct ac97_hwint *dev);
181
182 /* Sets the mixer DEV to the values in VALUE_LIST. Returns 0 on success,
183 or a negative error code. */
184 extern int ac97_set_values (struct ac97_hwint *dev,
185 struct ac97_mixer_value_list *value_list);
186
187 /* Writes the specified VALUE to the AC97 register REG in the mixer.
188 Takes care of setting the last-written cache as well. */
189 extern int ac97_put_register (struct ac97_hwint *dev, u8 reg, u16 value);
190
191 /* Default ioctl. */
192 extern int ac97_mixer_ioctl (struct ac97_hwint *dev, unsigned int cmd,
193 void __user * arg);
194
195 /* Do a complete reset on the AC97 mixer, restoring all mixer registers to
196 the current values. Normally used after an APM resume event. */
197 extern int ac97_reset (struct ac97_hwint *dev);
198 #endif
199
200 /*
201 * Local variables:
202 * c-basic-offset: 4
203 * End:
204 */
205
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