1 /*
2 * Definitions for PCI support.
3 */
4 #define FL_BASE_MASK 0x0007
5 #define FL_BASE0 0x0000
6 #define FL_BASE1 0x0001
7 #define FL_BASE2 0x0002
8 #define FL_BASE3 0x0003
9 #define FL_BASE4 0x0004
10 #define FL_GET_BASE(x) (x & FL_BASE_MASK)
11
12 /* Use successive BARs (PCI base address registers),
13 else use offset into some specified BAR */
14 #define FL_BASE_BARS 0x0008
15
16 /* do not assign an irq */
17 #define FL_NOIRQ 0x0080
18
19 /* Use the Base address register size to cap number of ports */
20 #define FL_REGION_SZ_CAP 0x0100
21
22 struct pciserial_board {
23 unsigned int flags;
24 unsigned int num_ports;
25 unsigned int base_baud;
26 unsigned int uart_offset;
27 unsigned int reg_shift;
28 unsigned int first_offset;
29 };
30
31 struct serial_private;
32
33 struct serial_private *
34 pciserial_init_ports(struct pci_dev *dev, struct pciserial_board *board);
35 void pciserial_remove_ports(struct serial_private *priv);
36 void pciserial_suspend_ports(struct serial_private *priv);
37 void pciserial_resume_ports(struct serial_private *priv);
38
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