1 /*
2 * sma cpu5 watchdog driver
3 *
4 * Copyright (C) 2003 Heiko Ronsdorf <hero@ihg.uni-duisburg.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 */
21
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/types.h>
25 #include <linux/errno.h>
26 #include <linux/miscdevice.h>
27 #include <linux/fs.h>
28 #include <linux/init.h>
29 #include <linux/ioport.h>
30 #include <linux/timer.h>
31 #include <linux/completion.h>
32 #include <linux/jiffies.h>
33 #include <asm/io.h>
34 #include <asm/uaccess.h>
35
36 #include <linux/watchdog.h>
37
38 /* adjustable parameters */
39
40 static int verbose = 0;
41 static int port = 0x91;
42 static int ticks = 10000;
43
44 #define PFX "cpu5wdt: "
45
46 #define CPU5WDT_EXTENT 0x0A
47
48 #define CPU5WDT_STATUS_REG 0x00
49 #define CPU5WDT_TIME_A_REG 0x02
50 #define CPU5WDT_TIME_B_REG 0x03
51 #define CPU5WDT_MODE_REG 0x04
52 #define CPU5WDT_TRIGGER_REG 0x07
53 #define CPU5WDT_ENABLE_REG 0x08
54 #define CPU5WDT_RESET_REG 0x09
55
56 #define CPU5WDT_INTERVAL (HZ/10+1)
57
58 /* some device data */
59
60 static struct {
61 struct completion stop;
62 volatile int running;
63 struct timer_list timer;
64 volatile int queue;
65 int default_ticks;
66 unsigned long inuse;
67 } cpu5wdt_device;
68
69 /* generic helper functions */
70
71 static void cpu5wdt_trigger(unsigned long unused)
72 {
73 if ( verbose > 2 )
74 printk(KERN_DEBUG PFX "trigger at %i ticks\n", ticks);
75
76 if( cpu5wdt_device.running )
77 ticks--;
78
79 /* keep watchdog alive */
80 outb(1, port + CPU5WDT_TRIGGER_REG);
81
82 /* requeue?? */
83 if( cpu5wdt_device.queue && ticks ) {
84 cpu5wdt_device.timer.expires = jiffies + CPU5WDT_INTERVAL;
85 add_timer(&cpu5wdt_device.timer);
86 }
87 else {
88 /* ticks doesn't matter anyway */
89 complete(&cpu5wdt_device.stop);
90 }
91
92 }
93
94 static void cpu5wdt_reset(void)
95 {
96 ticks = cpu5wdt_device.default_ticks;
97
98 if ( verbose )
99 printk(KERN_DEBUG PFX "reset (%i ticks)\n", (int) ticks);
100
101 }
102
103 static void cpu5wdt_start(void)
104 {
105 if ( !cpu5wdt_device.queue ) {
106 cpu5wdt_device.queue = 1;
107 outb(0, port + CPU5WDT_TIME_A_REG);
108 outb(0, port + CPU5WDT_TIME_B_REG);
109 outb(1, port + CPU5WDT_MODE_REG);
110 outb(0, port + CPU5WDT_RESET_REG);
111 outb(0, port + CPU5WDT_ENABLE_REG);
112 cpu5wdt_device.timer.expires = jiffies + CPU5WDT_INTERVAL;
113 add_timer(&cpu5wdt_device.timer);
114 }
115 /* if process dies, counter is not decremented */
116 cpu5wdt_device.running++;
117 }
118
119 static int cpu5wdt_stop(void)
120 {
121 if ( cpu5wdt_device.running )
122 cpu5wdt_device.running = 0;
123
124 ticks = cpu5wdt_device.default_ticks;
125
126 if ( verbose )
127 printk(KERN_CRIT PFX "stop not possible\n");
128
129 return -EIO;
130 }
131
132 /* filesystem operations */
133
134 static int cpu5wdt_open(struct inode *inode, struct file *file)
135 {
136 if ( test_and_set_bit(0, &cpu5wdt_device.inuse) )
137 return -EBUSY;
138
139 return nonseekable_open(inode, file);
140 }
141
142 static int cpu5wdt_release(struct inode *inode, struct file *file)
143 {
144 clear_bit(0, &cpu5wdt_device.inuse);
145 return 0;
146 }
147
148 static int cpu5wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
149 {
150 void __user *argp = (void __user *)arg;
151 unsigned int value;
152 static struct watchdog_info ident =
153 {
154 .options = WDIOF_CARDRESET,
155 .identity = "CPU5 WDT",
156 };
157
158 switch(cmd) {
159 case WDIOC_KEEPALIVE:
160 cpu5wdt_reset();
161 break;
162 case WDIOC_GETSTATUS:
163 value = inb(port + CPU5WDT_STATUS_REG);
164 value = (value >> 2) & 1;
165 if ( copy_to_user(argp, &value, sizeof(int)) )
166 return -EFAULT;
167 break;
168 case WDIOC_GETSUPPORT:
169 if ( copy_to_user(argp, &ident, sizeof(ident)) )
170 return -EFAULT;
171 break;
172 case WDIOC_SETOPTIONS:
173 if ( copy_from_user(&value, argp, sizeof(int)) )
174 return -EFAULT;
175 switch(value) {
176 case WDIOS_ENABLECARD:
177 cpu5wdt_start();
178 break;
179 case WDIOS_DISABLECARD:
180 return cpu5wdt_stop();
181 default:
182 return -EINVAL;
183 }
184 break;
185 default:
186 return -ENOIOCTLCMD;
187 }
188 return 0;
189 }
190
191 static ssize_t cpu5wdt_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos)
192 {
193 if ( !count )
194 return -EIO;
195
196 cpu5wdt_reset();
197
198 return count;
199 }
200
201 static struct file_operations cpu5wdt_fops = {
202 .owner = THIS_MODULE,
203 .llseek = no_llseek,
204 .ioctl = cpu5wdt_ioctl,
205 .open = cpu5wdt_open,
206 .write = cpu5wdt_write,
207 .release = cpu5wdt_release,
208 };
209
210 static struct miscdevice cpu5wdt_misc = {
211 .minor = WATCHDOG_MINOR,
212 .name = "watchdog",
213 .fops = &cpu5wdt_fops,
214 };
215
216 /* init/exit function */
217
218 static int __devinit cpu5wdt_init(void)
219 {
220 unsigned int val;
221 int err;
222
223 if ( verbose )
224 printk(KERN_DEBUG PFX "port=0x%x, verbose=%i\n", port, verbose);
225
226 if ( (err = misc_register(&cpu5wdt_misc)) < 0 ) {
227 printk(KERN_ERR PFX "misc_register failed\n");
228 goto no_misc;
229 }
230
231 if ( !request_region(port, CPU5WDT_EXTENT, PFX) ) {
232 printk(KERN_ERR PFX "request_region failed\n");
233 err = -EBUSY;
234 goto no_port;
235 }
236
237 /* watchdog reboot? */
238 val = inb(port + CPU5WDT_STATUS_REG);
239 val = (val >> 2) & 1;
240 if ( !val )
241 printk(KERN_INFO PFX "sorry, was my fault\n");
242
243 init_completion(&cpu5wdt_device.stop);
244 cpu5wdt_device.queue = 0;
245
246 clear_bit(0, &cpu5wdt_device.inuse);
247
248 init_timer(&cpu5wdt_device.timer);
249 cpu5wdt_device.timer.function = cpu5wdt_trigger;
250 cpu5wdt_device.timer.data = 0;
251
252 cpu5wdt_device.default_ticks = ticks;
253
254 printk(KERN_INFO PFX "init success\n");
255
256 return 0;
257
258 no_port:
259 misc_deregister(&cpu5wdt_misc);
260 no_misc:
261 return err;
262 }
263
264 static int __devinit cpu5wdt_init_module(void)
265 {
266 return cpu5wdt_init();
267 }
268
269 static void __devexit cpu5wdt_exit(void)
270 {
271 if ( cpu5wdt_device.queue ) {
272 cpu5wdt_device.queue = 0;
273 wait_for_completion(&cpu5wdt_device.stop);
274 }
275
276 misc_deregister(&cpu5wdt_misc);
277
278 release_region(port, CPU5WDT_EXTENT);
279
280 }
281
282 static void __devexit cpu5wdt_exit_module(void)
283 {
284 cpu5wdt_exit();
285 }
286
287 /* module entry points */
288
289 module_init(cpu5wdt_init_module);
290 module_exit(cpu5wdt_exit_module);
291
292 MODULE_AUTHOR("Heiko Ronsdorf <hero@ihg.uni-duisburg.de>");
293 MODULE_DESCRIPTION("sma cpu5 watchdog driver");
294 MODULE_SUPPORTED_DEVICE("sma cpu5 watchdog");
295 MODULE_LICENSE("GPL");
296 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
297
298 module_param(port, int, 0);
299 MODULE_PARM_DESC(port, "base address of watchdog card, default is 0x91");
300
301 module_param(verbose, int, 0);
302 MODULE_PARM_DESC(verbose, "be verbose, default is 0 (no)");
303
304 module_param(ticks, int, 0);
305 MODULE_PARM_DESC(ticks, "count down ticks, default is 10000");
306
This page was automatically generated by the
LXR engine.
Visit the LXR main site for more
information.