1 General Description
2 ===================
3
4 This driver supports the 53c700 and 53c700-66 chips. It also supports
5 the 53c710 but only in 53c700 emulation mode. It is full featured and
6 does sync (-66 and 710 only), disconnects and tag command queueing.
7
8 Since the 53c700 must be interfaced to a bus, you need to wrapper the
9 card detector around this driver. For an example, see the
10 NCR_D700.[ch] or lasi700.[ch] files.
11
12 The comments in the 53c700.[ch] files tell you which parts you need to
13 fill in to get the driver working.
14
15
16 Compile Time Flags
17 ==================
18
19 The driver may be either io mapped or memory mapped. This is
20 selectable by configuration flags:
21
22 CONFIG_53C700_MEM_MAPPED
23
24 define if the driver is memory mapped.
25
26 CONFIG_53C700_IO_MAPPED
27
28 define if the driver is to be io mapped.
29
30 One or other of the above flags *must* be defined.
31
32 Other flags are:
33
34 CONFIG_53C700_LE_ON_BE
35
36 define if the chipset must be supported in little endian mode on a big
37 endian architecture (used for the 700 on parisc).
38
39 CONFIG_53C700_USE_CONSISTENT
40
41 allocate consistent memory (should only be used if your architecture
42 has a mixture of consistent and inconsistent memory). Fully
43 consistent or fully inconsistent architectures should not define this.
44
45
46 Using the Chip Core Driver
47 ==========================
48
49 In order to plumb the 53c700 chip core driver into a working SCSI
50 driver, you need to know three things about the way the chip is wired
51 into your system (or expansion card).
52
53 1. The clock speed of the SCSI core
54 2. The interrupt line used
55 3. The memory (or io space) location of the 53c700 registers.
56
57 Optionally, you may also need to know other things, like how to read
58 the SCSI Id from the card bios or whether the chip is wired for
59 differential operation.
60
61 Usually you can find items 2. and 3. from general spec. documents or
62 even by examining the configuration of a working driver under another
63 operating system.
64
65 The clock speed is usually buried deep in the technical literature.
66 It is required because it is used to set up both the synchronous and
67 asynchronous dividers for the chip. As a general rule of thumb,
68 manufacturers set the clock speed at the lowest possible setting
69 consistent with the best operation of the chip (although some choose
70 to drive it off the CPU or bus clock rather than going to the expense
71 of an extra clock chip). The best operation clock speeds are:
72
73 53c700 - 25MHz
74 53c700-66 - 50MHz
75 53c710 - 40Mhz
76
77 Writing Your Glue Driver
78 ========================
79
80 This will be a standard SCSI driver (I don't know of a good document
81 describing this, just copy from some other driver) with at least a
82 detect and release entry.
83
84 In the detect routine, you need to allocate a struct
85 NCR_700_Host_Parameters sized memory area and clear it (so that the
86 default values for everything are 0). Then you must fill in the
87 parameters that matter to you (see below), plumb the NCR_700_intr
88 routine into the interrupt line and call NCR_700_detect with the host
89 template and the new parameters as arguments. You should also call
90 the relevant request_*_region function and place the register base
91 address into the `base' pointer of the host parameters.
92
93 In the release routine, you must free the NCR_700_Host_Parameters that
94 you allocated, call the corresponding release_*_region and free the
95 interrupt.
96
97 Handling Interrupts
98 -------------------
99
100 In general, you should just plumb the card's interrupt line in with
101
102 request_irq(irq, NCR_700_intr, <irq flags>, <driver name>, host);
103
104 where host is the return from the relevant NCR_700_detect() routine.
105
106 You may also write your own interrupt handling routine which calls
107 NCR_700_intr() directly. However, you should only really do this if
108 you have a card with more than one chip on it and you can read a
109 register to tell which set of chips wants the interrupt.
110
111 Settable NCR_700_Host_Parameters
112 --------------------------------
113
114 The following are a list of the user settable parameters:
115
116 clock: (MANDATORY)
117
118 Set to the clock speed of the chip in MHz.
119
120 base: (MANDATORY)
121
122 set to the base of the io or mem region for the register set. On 64
123 bit architectures this is only 32 bits wide, so the registers must be
124 mapped into the low 32 bits of memory.
125
126 pci_dev: (OPTIONAL)
127
128 set to the PCI board device. Leave NULL for a non-pci board. This is
129 used for the pci_alloc_consistent() and pci_map_*() functions.
130
131 dmode_extra: (OPTIONAL, 53c710 only)
132
133 extra flags for the DMODE register. These are used to control bus
134 output pins on the 710. The settings should be a combination of
135 DMODE_FC1 and DMODE_FC2. What these pins actually do is entirely up
136 to the board designer. Usually it is safe to ignore this setting.
137
138 differential: (OPTIONAL)
139
140 set to 1 if the chip drives a differential bus.
141
142 force_le_on_be: (OPTIONAL, only if CONFIG_53C700_LE_ON_BE is set)
143
144 set to 1 if the chip is operating in little endian mode on a big
145 endian architecture.
146
147 chip710: (OPTIONAL)
148
149 set to 1 if the chip is a 53c710.
150
151 burst_disable: (OPTIONAL, 53c710 only)
152
153 disable 8 byte bursting for DMA transfers.
154
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