Re: [IA64] Reduce __clear_bit_unlock overhead

From: Nick Piggin <nickpiggin_at_yahoo.com.au>
Date: 2007-10-21 14:43:31
On Friday 19 October 2007 21:12, Christoph Lameter wrote:
> On Fri, 19 Oct 2007, Nick Piggin wrote:
> > Of course, we can avoid the fence altogether on x86 as well, because
> > it simply isn't needed for release semantics.
>
> So we can generally switch to using wmb there?

Not for asm-generic/. But for x86, we don't anything actually
(because writes are ordered). I sent a patch to Linus for this
earlier -- he hasn't taken it yet, but I will ensure it gets
merged before 2.6.24.

Also I didn't get a chance to send out the other patches before,
because of issues with my net connection. Will do so now.

>
>
>
> __clear_bit_unlock: A write barrier is sufficient for release semantics
>
> Switch the smb_mb that causes a fence instruction to be issued on x86
> to a write barrier which issues no instruction on x86.
>
> Signed-off-by: Christoph Lameter <clameter@sgi.com>
>
> Index: linux-2.6/include/asm-generic/bitops/lock.h
> ===================================================================
> --- linux-2.6.orig/include/asm-generic/bitops/lock.h	2007-10-19
> 04:08:58.000000000 -0700 +++
> linux-2.6/include/asm-generic/bitops/lock.h	2007-10-19 04:09:17.000000000
> -0700 @@ -37,7 +37,7 @@ do {					\
>   */
>  #define __clear_bit_unlock(nr, addr)	\
>  do {					\
> -	smp_mb();			\
> +	smp_wmb();			\
>  	__clear_bit(nr, addr);		\
>  } while (0)
-
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Received on Sun Oct 21 14:48:54 2007

This archive was generated by hypermail 2.1.8 : 2007-10-21 14:49:10 EST