James Bottomley wrote: > I really don't think a work around for a PCI spec violation belongs in > the generic DMA code, do you? The correct fix for this should be to set > the device hints to strict ordering, which presumably altix respects? > In which case, it sounds like what needs exposing are access to the PCI > device hints. I believe both PCI-X and PCIe have these hints as > optional specifiers in the bridges, so it should be in a current Rev of > the PCI spec. Or are you proposing adding an additional PCI API that > allows transaction flushes to be inserted into the stream for devices > and bridges that have already negotiated relaxed ordering? ... in which > case we need to take this to the PCI list. James, I don't believe it respects those hints - I agree, it's a pita, but thats the state of the situation. Even if it did, it would make performance suck as Jesse also pointed out. As I pointed out in my email to Willy is that the NUMA fabric is routed, there's not one path through the system, which is what makes this happen. Jes - To unsubscribe from this list: send the line "unsubscribe linux-ia64" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.htmlReceived on Thu Aug 23 03:11:15 2007
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