Re: Ordering between PCI config space writes and MMIO reads?

From: Roland Dreier <rdreier_at_cisco.com>
Date: 2006-11-01 06:53:02
 > Here's what I don't understand: according to PCI rules, pci config read
 > can bypass pci config write (both are non-posted).
 > So why does doing it help flush the writes as the comment claims?

No, I don't believe a read of a config register can pass a write of
the same register.  (Someone correct me if I'm wrong)

 - R.
-
To unsubscribe from this list: send the line "unsubscribe linux-ia64" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Received on Wed Nov 01 06:53:35 2006

This archive was generated by hypermail 2.1.8 : 2006-11-01 06:53:50 EST