Re: Ordering between PCI config space writes and MMIO reads?

From: Roland Dreier <rdreier_at_cisco.com>
Date: 2006-10-26 00:05:59
 > I'll check if there is any additional reordering that can occur AFTER the
 > PIO_WRITE_COUNT goes to zero.  If so, it would be at bus level - not in
 > shub or routers.

Unfortunately, at least in theory, the reordering can occur.  For
example a bridge on some card plugged into an SN slot is allowed to
reorder things too.

 - R.
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Received on Thu Oct 26 00:06:41 2006

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