Re: Synchronizing Bit operations V2

From: Christoph Lameter <clameter_at_sgi.com>
Date: 2006-04-01 04:45:18
On Fri, 31 Mar 2006, Andi Kleen wrote:

> Christoph Lameter <clameter@sgi.com> writes:
> > MODE_BARRIER
> > 	An atomic operation that is guaranteed to occur between
> > 	previous and later memory operations.
> I think it's a bad idea to create such an complicated interface.
> The chances that an average kernel coder will get these right are
> quite small. And it will be 100% untested outside IA64 I guess
> and thus likely be always slightly buggy as kernel code continues
> to change.

Powerpc can do similar things AFAIK. Not sure what other arches have 
finer grained control over barriers but it could cover a lot of special 
cases for other processors as well.

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Received on Sat Apr 01 04:46:03 2006

This archive was generated by hypermail 2.1.8 : 2006-04-01 04:46:18 EST