Re: Synchronizing Bit operations V2

From: Nick Piggin <nickpiggin_at_yahoo.com.au>
Date: 2006-03-31 13:53:21
Chen, Kenneth W wrote:
> Christoph Lameter wrote on Thursday, March 30, 2006 6:38 PM
> 
>>>>Neither one is correct because there will always be one combination of 
>>>>clear_bit with these macros that does not generate the required memory 
>>>>barrier.
>>>
>>>Can you give an example?  Which combination?
>>
>>For Option(1)
>>
>>smp_mb__before_clear_bit()
>>clear_bit(...)(
> 
> 
> Sorry, you totally lost me.  It could me I'm extremely slow today.  For
> option (1), on ia64, clear_bit has release semantic already.  The comb
> of __before_clear_bit + clear_bit provides the required ordering.  Did
> I miss something?  By the way, we are talking about detail implementation
> on one specific architecture.  Not some generic concept that clear_bit
> has no ordering stuff in there.
> 

The memory ordering that above combination should produce is a
Linux style smp_mb before the clear_bit. Not a release.

-- 
SUSE Labs, Novell Inc.
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Received on Fri Mar 31 16:45:11 2006

This archive was generated by hypermail 2.1.8 : 2006-03-31 16:45:20 EST