RE: accessed/dirty bit handler tuning

From: Chen, Kenneth W <kenneth.w.chen_at_intel.com>
Date: 2006-03-16 04:37:15
Zoltan Menyhart wrote on Wednesday, March 15, 2006 5:30 AM
> This patch is based on the Christoph's one entitled "Fix race in the
> accessed/dirty bit handlers".
> 
> - It adds the lacking "srlz.d"

It is still not clear whether srlz.d is required or not, right?  Wording
in SDM is vague.  Through experiment, I've verified that itc instruction
observe full instruction latency with respect to memory operation that
immediately follows it. It is pretty much in-line with what I think what
the SDM is trying to say: it has implicit semi-serialization (next
memory
operation won't proceed until itc.d finishes).


> - It uses some "nta"

Do you have any performance data showing that nta is a win?

- Ken
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Received on Thu Mar 16 04:39:28 2006

This archive was generated by hypermail 2.1.8 : 2006-03-16 04:39:36 EST