RE: accessed/dirty bit handler tuning

From: Luck, Tony <tony.luck_at_intel.com>
Date: 2006-03-14 07:05:00
 
>Hmm, I think another alternative is to rip out all the itc insertion
>code and let the hardware page walker do the "dirty" job.  Because it
>is known and architected to be atomic-read-and-insert and is also
>known to honor ptc.g while atomic-read-and-insert is in-flight (i.e.,
>won't insert tlb entry).

Can we get some perf. numbers ... this will take each dirty fault twice
(though the second should be fast if VHPT does it's job).  This might
be slower than putting in the srlz.d that Zoltan wants.

-Tony
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Received on Tue Mar 14 07:06:10 2006

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