Re: Fix race in the accessed/dirty bit handlers

From: Christoph Lameter <clameter_at_sgi.com>
Date: 2006-03-10 05:27:43
On Thu, 9 Mar 2006, Zoltan Menyhart wrote:

> In short: unless we use "srlz.d", how to make sure:
> - the visibility of the "itc" instruction to generated purges is
>  guaranteed first
> - issuing "ld" goes after ?

The manual states that serialization is only necessary before a data 
access uses the mapping. We do not use the mapping in the function we are 
discussing and I would think that the rfi is certainly serialization 
enough.

The manual also has a rather complex section on ptc purges.

I think we need to refer to how our purges work under ia64.

What we do in essence from the remote processor is:

1. We invalidate a pte (overwite the entry with zero)

2. We purge the caches (and then broadcast the purge?).

So if the fault handlers run then they will discover that either the pte 
has been zapped or the cmpxchg will fail. In either case we just do 
nothing and redo the fault.

I guess this scheme could fail if the remote processor would 
zap the pte and do the broadcast between the local processors cmpxchg and 
the itc. Thats only two bundles. 

Maybe we need some experts to explain the situation. Ken? David?

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Received on Fri Mar 10 05:30:03 2006

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