RE: [patch 1/6] align kenrel rbs on 128 byte

From: Chen, Kenneth W <kenneth.w.chen_at_intel.com>
Date: 2006-01-31 20:42:59
Keith Owens wrote on Tuesday, January 31, 2006 12:57 AM
> "Chen, Kenneth W" (on Tue, 31 Jan 2006 00:48:28 -0800) wrote:
> >The bottom of kernel rbs stack is the memory used to spill user
> >dirty stack register partition when entering the kernel.  This
> >space is heavily used on every kernel entry and exit. It deserve
> >having its own dedicated cache line and not to share with tail
> >end of thread_info which is not used heavily.
> >
> >Align the bottom of kernel rbs stack to 128 byte boundary.
> >
> >Signed-off-by: Ken Chen <kenneth.w.chen@intel.com>
> >
> 
> The cache lines are not guaranteed to be 128 byte aligned, they
> were 64 on bigsur.  Change 127 to (L1_CACHE_BYTES - 1).

That did cross my mind and L1_CACHE_BYTES is such a misleading
name.  In my head, L1 means the cache level closest to the CPU
core, but here it appears to represent last level cache line.
Do we have the numbering scheme reversed?  I have no idea what's
going on here. 

- Ken

p.s. It's amazing people is still using bigsur. Long live Itanium!

-
To unsubscribe from this list: send the line "unsubscribe linux-ia64" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Received on Tue Jan 31 20:43:46 2006

This archive was generated by hypermail 2.1.8 : 2006-01-31 20:43:54 EST