Bjorn Helgaas (on Mon, 30 Jan 2006 15:11:57 -0700) wrote: >If SAL_CACHE_FLUSH drops interrupts, complain about it and fall back to >using PAL_CACHE_FLUSH instead. >+ while (!ia64_get_irr(IA64_TIMER_VECTOR)) >+ ; cpu_relax() instead of an empty loop? Besides being the "right thing" for dual cores, it also guarantees that the compiler will not optimize away or move the loop. ia64_get_irr() maps to ia64_getreg() which on gcc is not optimized away, but in icc ia64_getreg() maps to __getReg() and I am not sure if that can be optimized or moved. The Intel compiler documentation is silent on this topic. FWIW, I tried the patch on SGI SN2 hardware - there was no error message from check_sal_cache_flush(). - To unsubscribe from this list: send the line "unsubscribe linux-ia64" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.htmlReceived on Tue Jan 31 10:13:20 2006
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