On Mon, Jan 16, 2006 at 08:32:56PM -0800, Luck, Tony wrote: > The Dual-Core Update to the Intel Itanium 2 Processor > Reference Manual is now available publicly On page 173 it mentions "cycles we run with PCR.sd" set. What's that? On page 174 it talks about THREAD_SWITCH_GATED. What is a gated thread switch? Particularly it mentions being gated due to LP, what is that? On page 176 it mentions a srlz.i instruction causes a "microtrap" and an xpn-flush. What are they? TLB entries are tagged with the hardware thread. Is there any possibility to override this (I mean, even theoretically)? -i - To unsubscribe from this list: send the line "unsubscribe linux-ia64" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
This archive was generated by hypermail 2.1.8 : 2006-01-17 16:40:54 EST