Why is psr.ic off for ia64_pal_cache_flush?

From: Tian, Kevin <kevin.tian_at_intel.com>
Date: 2005-12-26 16:44:55
I know that currently there's no such invocation to ia64_pal_cache_flush
within ia64 linux kernel, but like to know why it's the only instance to
call PAL_CALL_IC_OFF under virtual mode? Since there's no DTR setup for
pal area, it can only work if DTC entry exists just before off psr.ic,
or pal procedure for this type doesn't issue any data access. Or else
nested dtlb miss may happen and it seems not to be handled by current
linux code.

Currently this stub is invoked by XEN (an open source VMM with code
derived from linux) to sync I/D cache after management tool loads kernel
image and initrd of another domain (guest OS). Though we may take place
of it by fc.i, I'm still curious to know historical background for this
design.

Thanks in advance,
Kevin
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Received on Mon Dec 26 16:45:33 2005

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