RE: [RFC] 4-level page table directories.

From: Luck, Tony <tony.luck_at_intel.com>
Date: 2005-11-10 05:39:53
>Have we all agreed by now that the performance hit is relatively minor
>(unmeasurable for most cases due to it being less than the noise of the
>samples) from 4-level page tables?  Do I need to do any more performance
>measurements?

The transaction processing benchmark hit, although small isn't minor.
Ken has had to fight for every 0.1% increment ... so setting him back
by 0.2% with a patch that is only needed for some very large systems
(>3192cpus according to your October 28th post) is a tough thing to do.

Once you've worked out the remaining kinks in the patch so that
64K page (and 4GB hugetlb page) work, I can take it with the
configuration option (with the default set to 3-level).  I realize
that is only of marginal use, as you have the issue of getting
OSDs to ship with a kernel configured this way, and getting ISVs
to qualify their applications to run on this configuration.  But
don't you already have that issue with persuading them to ship
with CONFIG_NR_CPUS=16384?  Surely there are a whole boatload of
tuneables and patches needed to get this sized system up and running?
4-level pagetables are just one piece of the puzzle.

-Tony
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Received on Thu Nov 10 05:44:55 2005

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