On Mon, Nov 07, 2005 at 01:18:37PM -0800, Luck, Tony wrote: > >Another thing: has people tested 4 level page table with 4GB hugetlb page > >size? Looks like pud is already falling short on bits and entire pgd bits > >will be falling off the 64-bit. 128-bit computing anybody? (just kidding). > > I didn't try 4GB huge page ... but I did just try to build with > a 64K normal page, and the build failed with fatal errors in ivt.S > because of attempts to shift by more than 64. There are also > a gazillion[1] warnings about "left shift count >= width of type" > from all over the build. > > Perhaps arch/ia64/Kconfig shouldn't let you choose 4-level tables > with a 64K pagesize? I have this compiling now with 3 or 4 page table levels. Given that 4 levels with 64k pages results in only having 1/8 of the page used, I think I am going to get rid of my desire to not have this configurable (I will merge the two patches together into one). I still think that 4 level is probably a reasonable default. With all the benchmarks I ran, the difference remains in the noise range. Worst case change is approx 0.3% change in microbenchmarks with approx 2% noise. Many have less that 0.1% change. That seems reasonable. As for larger page sizes, those config options seem to be removed. How would you normally go about doing a 4GB huge page? Is there more to it than adding the config option back in? With the latest changes I made to ivt.S, my 3-level selection no longer boots so I will delay posting until I have that working. Thanks, Robin Holt - To unsubscribe from this list: send the line "unsubscribe linux-ia64" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.htmlReceived on Thu Nov 10 01:32:39 2005
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