RE: flush_icache_range

From: Jim Hull <>
Date: 2005-06-03 05:00:22

> I guess what you're saying is that the architecture imposes no such
> constraint and the OS _must_ flush at the minium stride across all
> CPUs.  Right?

Yes.  And note that for current implementations, the minimum stride is
determined by the L1 cache, not the L3 (but you shouldn't count on that either -
just ask PAL about all the levels, and take the minimum).

 -- Jim

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Received on Thu Jun 2 15:00:52 2005

This archive was generated by hypermail 2.1.8 : 2005-08-02 09:20:39 EST