RE: PCI Express

From: Nguyen, Tom L <tom.l.nguyen_at_intel.com>
Date: 2005-03-10 06:43:56
On Wednesday, March 09, 2005 10:48 AM Grant Grundler wrote:

>> I am very much interested in your assertion that the MSI address is 
>> defined by PCI Spec to be 0xfeex_xxxx.
>...
>> Can you kindly point me to the relevent section?
>
>It's not and it doesn't belong there.
>
>IA64 specs defines Processor Interrupt Block and where it lives.
>See "Intel(r) Itanium(r) Software Developer's Manual"
>	Volume 2, Part 1, Section 5.8.4
>	Volume 2, Part 1, Section 11.9.3

I apologize that it is not in PCI Spec. It is also in Section 8.11 of
"IA-32 Intel Architecture Software Developer's Manual (volume 3)."

Thanks,
Long
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Received on Wed Mar 9 14:50:08 2005

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