Re: PCI Express

From: Colin Ngam <cngam_at_sgi.com>
Date: 2005-03-10 02:45:18
Grant Grundler wrote:

Hi Grant,

Thanks for the info.

Bottomline - Processor Interrupt Block not implemented on Altix.

Thanks.

colin

> On Tue, Mar 08, 2005 at 05:29:13PM -0800, Jesse Barnes wrote:
> ...
> > An MSI should behave like a processor sending an IPI to itself since its
> > address can be targeted at the processor's interrupt block and set to
> > generate a local interrupt.  Is that right, Tom & Grant?
>
> Yes - that's how I understand it too.
>
> > If this won't work for us, no biggie, we just have to abstract things a
> > little more.  We could make the MSI into a platform specific cookie that
> > we can store a SHub/PIC/TIO address in and other platforms can use to
> > target the processor interrupt block.
>
> Couple more options:
> o add hooks for MSI quirk/fixup for *after* the MSI has been assigned
>   by generic code.
>
> o make sure all MSI only go to "node local" processors. I thought
>   platform code has some control over the CPU EID and data portion of
>   the MSI. But I haven't looked over that in a few monthes.
>
> grant
> -
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Received on Wed Mar 9 10:45:46 2005

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