RE: [PATCH] Convert pgtable cache to slab

From: Luck, Tony <tony.luck_at_intel.com>
Date: 2005-02-16 05:29:51
Robin> For the 4-level case with 64k pages, what about just using
Robin> 16k page tables?  That leaves us with 60 bits of addressable
Robin> space which is fairly close to the full space.

David> You're kidding, right?  If getting "fairly close" to 64 bits was good
David> enough, there would be no point for 64KB pages.

User space will only end up with just over 63.5 bits since the kernel
has grabbed regions 5, 6, 7 for itself.  Unless someone comes up with
a 16EB+16EB patch analogous to the 4G+4G ia32 patch :-)

We also lose some space out of each region for the VHPT.

Region 4 is reserved for hugetlb pages.

Page 0 of region 0 is a NaT page.

So we fall short of a full, flat 64-bit address space for a variety
of reasons.

Nonetheless, I agree with David that reducing available virtual
space by a factor of 16 sounds like a poor idea.

-Tony
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Received on Tue Feb 15 13:31:15 2005

This archive was generated by hypermail 2.1.8 : 2005-08-02 09:20:35 EST