RE: [rfc] generic allocator and mspec driver

From: Luck, Tony <tony.luck_at_intel.com>
Date: 2005-02-15 06:12:54
>Anyway, it seems that lcrash at least only accesses the memory using
>read() and write()? which means it is relatively easy to using a
>struct page flag to do uncached vs cached access on the fly. mmap on
>the other hand would be a bit of a nightmare as it would require a
>custom fault handler that would know when to go cached and when not
>to.
>
>How would you feel about using PG_arch_1 for this on ia64?

Is ia64 the only architecture that has uncached vs. cached access
issues?  If so, the PG_arch_1 might have to be the solution, but
surely others have cache coherence problems too if there are mixed
cacheable and uncacheable access to the same memory?  In which case
a new generic bit would be more appropriate.

A few weeks back there was also some discussion about allocating
one or more bits to mark bad pages (those containing ECC errors)
as "do not touch".

-Tony
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Received on Mon Feb 14 14:13:20 2005

This archive was generated by hypermail 2.1.8 : 2005-08-02 09:20:35 EST