Re: page table lock patch V15 [0/7]: overview

From: Andi Kleen <>
Date: 2005-01-15 04:01:40
> Looked at  arch/i386/lib/mmx.c. It avoids the mmx ops in an interrupt
> context but the rest of the prep for mmx only saves the fpu state if its
> in use. So that code would only be used rarely. The mmx 64 bit
> instructions seem to be quite fast according to the manual. Double the
> cycles than the 32 bit instructions on Pentium M (somewhat higher on Pentium 4).

With all the other overhead (disabling exceptions, saving register etc.)
will be likely slower. Also you would need fallback paths for CPUs 
without MMX but with PAE (like Ppro). You can benchmark
it if you want, but I wouldn't be very optimistic. 

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Received on Fri Jan 14 12:05:30 2005

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