cacheble to uncachble change

Is there support in IA64 kernel to change a memory mapping from
cacheble to uncacheble  attribute. By support I mean one function
which can accept an addr start/range,  make sure in-transit
cache data/prefetch  hits are synced and upon return gurantee
no CPU has any stale data in its caches and after installing the new
attribute memory is guranteed synchronized. Or is a combonition
of functions/macros required?

- Mario


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