Re: Hugetlbpages in very large memory machines.......

From: Nobuhiko Yoshida <>
Date: 2004-03-16 14:15:08

> > +/*      update_mmu_cache(vma, address, *pte); */
> I have not studied low level IA64 VM in detail, but don't you need
> some kind of TLB flush here?

Oh! Yes.
Perhaps, TLB flush is needed here.

Thank you,
Nobuhiko Yoshida
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Received on Mon Mar 15 22:23:09 2004

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