RE: Nested interrupts in IA64 linux?

From: Luck, Tony <tony.luck_at_intel.com>
Date: 2004-02-18 04:43:59
Ameya,

Perhaps your confusion about whether nested interrupts
are supported comes from the definition of the PSR.i
bit?  When PSR.i is set to zero, then all interrupts of
all priorities are blocked.  The cpu does clear PSR.i
when an interrupt occurs ... so that the OS handler
can do whatever it needs to do so save enough processor
state to allow the interrupt handler to execute.

Linux restores PSR.i from the saved value relatively
soon after beginning execution of Linux handler code.
This re-enables interrupts (at the processor level).

-Tony

> -----Original Message-----
> From: David Mosberger [mailto:davidm@napali.hpl.hp.com]
> Sent: Saturday, February 14, 2004 12:04 AM
> To: ameya.mitragotri@wipro.com
> Cc: linux-ia64@vger.kernel.org; davidm@napali.hpl.hp.com; 
> kaos@sgi.com;
> Luck, Tony
> Subject: Re: Nested interrupts in IA64 linux?
> 
> 
> >>>>> On Sat, 14 Feb 2004 12:10:27 +0530, 
> ameya.mitragotri@wipro.com said:
> 
>   Ameya> Does Linux support nested interrupts on IA64?
> 
> Yes.
> 
>   Ameya> We are trying to do this because we want to dump (using LKCD)
>   Ameya> in a keyboard interrupt context. This dump performs write on
>   Ameya> the SCSI device(Fusion MPT), but we never seem to receive a
>   Ameya> SCSI interrupt indicating write completion.
> 
> Interrupts are divided into priority classes (16 vectors per class).
> An interrupt at a vector that maps to a lower-or-equal class cannot
> interrupt a pending interrupt.  The exact irq mapping will depend on
> your machine (and may depend on the kernel), but here is an example
> for a zx2000:
> 
> $ cat /proc/interrupts
>            CPU0
>  28:        132          LSAPIC  cpe_poll
>  29:          0          LSAPIC  cmc_poll
>  31:          0          LSAPIC  cmc_hndlr
>  48:          0  IO-SAPIC-level  acpi
>  49:      15566   IO-SAPIC-edge  serial
>  60:         30  IO-SAPIC-level  sym53c8xx
>  61:     445042  IO-SAPIC-level  sym53c8xx
>  62:      76142  IO-SAPIC-level  ohci_hcd
>  63:     170072  IO-SAPIC-level  ohci_hcd
>  64:          0  IO-SAPIC-level  ehci_hcd
>  65:         19  IO-SAPIC-level  ide1
>  66:    2985681  IO-SAPIC-level  eth0
>  67:          0  IO-SAPIC-level  FM801
> 232:          0          LSAPIC  mca_rdzv
> 238:          0          LSAPIC  perfmon
> 239:  121556726          LSAPIC  timer
> 240:          0          LSAPIC  mca_wkup
> NMI:          0
> ERR:          0
> 
> In this case, the SCSI controllers (sym53c8xx) are at vectors 60 and
> 61, which maps to priority class 3.  The USB vectors (62-64) map to
> either priority class 3 or 4, so it's not surprising that you don't
> get any SCSI interrupts while handing a (USB) keyboard interrupt.
> 
> If you want to force SCSI interrupts to come through, you'd have to
> lower the task-priority-register (TPR).  You can see in
> ia64_handle_irq() how this is done.  Of course, do this at our own
> risk!
> 
> 	--david
> 
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Received on Tue Feb 17 12:45:43 2004

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