>>>>> On Wed, 28 May 2003 13:35:53 -0700, "Luck, Tony" <tony.luck@intel.com> said: Tony> The underlying algorithm is to save information about what Tony> each of the ITR/DTR registers is mapping, then at MCA time we Tony> can purge the whole TLB (TC and TR) and reload the TR Tony> registers before jumping to virtual mode. Are you just blindly trusting that memory is still correct after getting a TLB error report? Wouldn't you want to have a checksum to validate that the list of saved translations is probably correct. Otherwise, it seems to me the TLB purge could make a bad situation worse. --davidReceived on Fri May 30 18:35:57 2003
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