On Thu, May 15, 2003 at 07:31:20PM -0500, James Bottomley wrote: > On Thu, 2003-05-15 at 19:17, David S. Miller wrote: > > Having to support DAC cycles does not mean that it must support full > > 64-bit DMA addresses in it's descriptors. > > > > A cost sensitive PCI-X device may wish to use 32-bit addressing in > > it's descriptors in order to keep pin counts down etc. > > This is certainly a property of the aic79xx driver (only using 32 bit > descriptor tables). It has this nice code in the driver for doing it: This is a driver choice, rather than an adapter limitation, right? Or is the adapter limited to 32 bit addresses for map->bus_addr (the PCI-X flavor)? > aic79xx.c: > > /* > * Although we can dma data above 4GB, our > * "consistent" memory is below 4GB for > * space efficiency reasons (only need a 4byte > * address). For this reason, we have to reset > * our dma mask when doing allocations. > */ > if (ahd->dev_softc != NULL) > ahd_pci_set_dma_mask(ahd->dev_softc, 0xFFFFFFFF); > *vaddr = pci_alloc_consistent(ahd->dev_softc, > dmat->maxsize, &map->bus_addr); > if (ahd->dev_softc != NULL) > ahd_pci_set_dma_mask(ahd->dev_softc, > ahd->platform_data->hw_dma_mask); > > And it comes in PCI-X flavours. > > James >Received on Fri May 16 01:03:28 2003
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