-----Original Message----- From: linux-ia64-request@linuxia64.org [mailto:linux-ia64-request@linuxia64.org] Sent: 2003-05-10 (토) 오전 11:18 To: linux-ia64@linuxia64.org Cc: Subject: Linux-IA64 digest, Vol 1 #1023 - 9 msgs Send Linux-IA64 mailing list submissions to linux-ia64@linuxia64.org To subscribe or unsubscribe via the World Wide Web, visit http://lists.linuxia64.org/lists/listinfo/linux-ia64 or, via email, send a message with subject or body 'help' to linux-ia64-request@linuxia64.org You can reach the person managing the list at linux-ia64-admin@linuxia64.org When replying, please edit your Subject line so it is more specific than "Re: Contents of Linux-IA64 digest..." Today's Topics: 1. Re: Re: [PATCH] head.S fix for unusual load addrs (Jesse Barnes) 2. Re: Re: [PATCH] head.S fix for unusual load addrs (Jack Steiner) 3. Re: Re: [PATCH] head.S fix for unusual load addrs (Jack Steiner) 4. Re: Re: [PATCH] head.S fix for unusual load addrs (David Mosberger) 5. Re: [PATCH] fix timer interrupts getting lost (Bjorn Helgaas) 6. RE: Re: [PATCH] head.S fix for unusual load addrs (Luck, Tony) 7. Re: [PATCH] 1/4 multi-ioport space support for 2.5 (David Mosberger) 8. Re: [PATCH] 1/4 multi-ioport space support for 2.5 (David Mosberger) 9. RE: Linux-IA64 digest, i want mailing list (=?euc-kr?B?waQgwb7B2A==?=) --__--__-- Message: 1 Date: Fri, 9 May 2003 12:30:36 -0700 From: Jesse Barnes <jbarnes@sgi.com> To: davidm@hpl.hp.com Cc: "Luck, Tony" <tony.luck@intel.com>, linux-ia64@linuxia64.org Subject: Re: [Linux-ia64] Re: [PATCH] head.S fix for unusual load addrs On Fri, May 09, 2003 at 11:25:29AM -0700, David Mosberger wrote: > I'm not sure. I got the impression Tony may be looking at the virtual > remapping in region 5. I haven't heard whether text replication > turned out to be important for 8870, but I'm starting to lean towards > virtual remapping because it is more versatile (can handle both > "strange" physical memory layouts and kernel replication). This, > coupled with the fact that it doesn't break any of the existing tools > makes it pretty compelling. Also, my primary objection about making > the kernel model more complicated doesn't hold much water if we move > everything to region 5. > > Would there be a downside to this on SGI's machines? Not that I can see--we've been using that method for awhile now with good success, and I'd be happy to test any 2.5 patches that implement this feature. So I guess we should go with virtual remapping? Tony? Thanks, Jesse --__--__-- Message: 2 From: Jack Steiner <steiner@sgi.com> To: jbarnes@sgi.com (Jesse Barnes) Date: Fri, 9 May 2003 14:31:54 -0500 (CDT) Cc: tony.luck@intel.com (Luck Tony), davidm@hpl.hp.com, linux-ia64@linuxia64.org Subject: Re: [Linux-ia64] Re: [PATCH] head.S fix for unusual load addrs > > On Wed, May 07, 2003 at 04:24:09PM -0700, Luck, Tony wrote: > > 1) My patch (posted around October last year) which picked virtual addresses > > in the wild blue yonder (initial versions used 0xe002000000000000, later ones > > used 0xffffffff00000000) for the link address for the kernel. Elilo can load > > kernel at any suitably aligned physical address, and head.S establishes the > > mappings using itr[0] and dtr[0]. > > > > pros) provided separate maps for kernel text and data, so supported kernel text > > replication too. > > cons) __pa() no longer works on kernel addresses, use new __tpa() instead. > > Some ugly runtime patching of kernel code to get physical address of > > swapper_pg_dir into the TLB miss code. The __tpa macros are ugly but they are fully contained within the ia64 part of the tree. (IIRC, the old scheduler had a reference but the O(1) scheduler doe not). In our tree, there are currently only 12 references to __tpa. All are in boottime initialization code., mostly in mca.c. Although I would rather not have __tpa, this doesnt seem too bad. > > > > 2) I think SGI are currently running a modified version of #1 without the text > > replication support, and that provides a mapping from the normal virtual > > address that the kernel is linked for (0xe00000000044000000) to whatever physical > > address it was actually loaded at ... at least I think that's what Jack said. Right. > > > > pros) simpler than my patch > > > > cons) Still needs __tpa() instead of __pa() for kernel addresses. > > > > 3) David's suggestion of boot-time relocation. Probably simplest to implement > > this in elilo, but if you are really good at PIC asm code it could be done in > > the kernel startup sequence. > > > > pros) Just like linking kernel at a new address. > > Avoids the __tpa() issue. > > Doesn't invalidate any assumptions about how to get from virtual to > > physical addresses and back again. > > > > cons) Nobody has implemented it. > doesn't address text replication concerns, while (1) and (2) > do > > So, is there any consensus on the best path to pursue? Chris Wedgwood > is working on option #3, and I've got Tony's patch trimmed down to #2 > (with one piece missing--ia64_switch_to runtime patching), but none of > these are in either 2.4 or 2.5 yet. Maybe for 2.4 we should do #2 or > #3 and for 2.5 we could implement #1 with the virtual offsets Tony > mentioned earlier? As far as I can tell, #1 is the only solution that will support kernel text replication. We did experiments to measure the effect of kernel text replication. On AIM7, (granted, not the best benchmark), we see a small but consistent improvement in performance with text replication enabled. (Data attached below). The biggest difference is cputime, not throughput. This was from a relatively small system with very good remote-to-local latency ratios. As system sizes increase, I expect the benefit of text replication will increase. I think that whatever solution is adopted, it need to accommadate text replication. If we are going to do #1 for 2.5, it seems like #2 is the best solution for 2.4. #3 requires changes elilo & the way System.map is used. These changes wont apply to 2.5. #3 also will introduce some confusion since the System.map that is generated at build time cant be used without knowing the physical address where elilo actually loaded the kernel. The address could change based on minor changes in the configuration (amount of memory, devices, nodes, etc). ------ AIM7 Kernel Text replication: Tasks Jobs/Min JTI Real CPU Jobs/sec/task 200 18110.2 84 64.3 619.6 1.5092 500 23932.5 76 121.6 2947.1 0.7977 1000 24402.0 71 238.5 9890.6 0.4067 2000 23895.4 71 487.1 25537.8 0.1991 3000 22848.8 75 764.2 42549.7 0.1269 4000 20420.4 78 1140.0 64237.4 0.0851 Baseline Tasks Jobs/Min JTI Real CPU Jobs/sec/task 200 18008.8 84 64.6 624.1 1.5007 500 23102.2 76 126.0 4238.1 0.7701 1000 23886.4 71 243.7 10507.3 0.3981 2000 23669.9 72 491.8 26120.2 0.1972 3000 22344.9 75 781.4 42965.0 0.1241 4000 20256.9 78 1149.2 64711.0 0.0844 > > Thanks, > Jesse > > _______________________________________________ > Linux-IA64 mailing list > Linux-IA64@linuxia64.org > http://lists.linuxia64.org/lists/listinfo/linux-ia64 > -- Thanks Jack Steiner (651-683-5302) (vnet 233-5302) steiner@sgi.com --__--__-- Message: 3 From: Jack Steiner <steiner@sgi.com> To: davidm@hpl.hp.com Date: Fri, 9 May 2003 15:02:47 -0500 (CDT) Cc: jbarnes@sgi.com (Jesse Barnes), tony.luck@intel.com (Luck Tony), linux-ia64@linuxia64.org Subject: Re: [Linux-ia64] Re: [PATCH] head.S fix for unusual load addrs > > >>>>> On Fri, 9 May 2003 10:52:25 -0700, Jesse Barnes <jbarnes@sgi.com> said: > > Jesse> So, is there any consensus on the best path to pursue? Chris Wedgwood > Jesse> is working on option #3, and I've got Tony's patch trimmed down to #2 > Jesse> (with one piece missing--ia64_switch_to runtime patching), but none of > Jesse> these are in either 2.4 or 2.5 yet. Maybe for 2.4 we should do #2 or > Jesse> #3 and for 2.5 we could implement #1 with the virtual offsets Tony > Jesse> mentioned earlier? > > I'm not sure. I got the impression Tony may be looking at the virtual > remapping in region 5. I haven't heard whether text replication > turned out to be important for 8870, but I'm starting to lean towards > virtual remapping because it is more versatile (can handle both > "strange" physical memory layouts and kernel replication). This, > coupled with the fact that it doesn't break any of the existing tools > makes it pretty compelling. Also, my primary objection about making > the kernel model more complicated doesn't hold much water if we move > everything to region 5. > > Would there be a downside to this on SGI's machines? I dont see any significant problems. It actually seems easy. I think we still need to use __tpa() for addresses assigned by the loader. The standard __pa() macros wont work in region 5. I dont have any objections to __tpa. We have had them in the kernel since ~2.3.42 & have not had any problems with them. On occasion, when we upgrade, we have to add/delete a couple of references but these are always easy to find. I dont recall any changes for the last couple of upgrades but maybe we were just lucky. As I mention in mail earlier, >> The __tpa macros are ugly but they are fully contained within the ia64 part >> of the tree. (IIRC, the old scheduler had a reference but the O(1) scheduler doe not). >> In our tree, there are currently only 12 references to __tpa. All are >> in boottime initialization code, mostly in mca.c. Although I would >> rather not have __tpa, this doesnt seem too bad. > > --david > > _______________________________________________ > Linux-IA64 mailing list > Linux-IA64@linuxia64.org > http://lists.linuxia64.org/lists/listinfo/linux-ia64 > -- Thanks Jack Steiner (651-683-5302) (vnet 233-5302) steiner@sgi.com --__--__-- Message: 4 From: David Mosberger <davidm@napali.hpl.hp.com> Date: Fri, 9 May 2003 13:25:06 -0700 To: Jack Steiner <steiner@sgi.com> Cc: davidm@hpl.hp.com, jbarnes@sgi.com (Jesse Barnes), tony.luck@intel.com (Luck Tony), linux-ia64@linuxia64.org Reply-To: davidm@hpl.hp.com Subject: Re: [Linux-ia64] Re: [PATCH] head.S fix for unusual load addrs >>>>> On Fri, 9 May 2003 15:02:47 -0500 (CDT), Jack Steiner <steiner@sgi.com> said: >> Would there be a downside to this on SGI's machines? Jack> I dont see any significant problems. It actually seems easy. Good. Jack> I think we still need to use __tpa() for addresses assigned by Jack> the loader. The standard __pa() macros wont work in region 5. That's why I don't mind: nobody can use __pa() on region 5 anyhow, so using something different (page table walk or __tpa()) is OK. I was real uneasy with having a "magic" address range inside region 7, where __pa() wouldn't work. But in region 5, no problem. It might be good to call __tpa() something different: it's too close to __pa() and the difference may easily be overlooked. For example, ia64_tpa() would make it obvious that we're talking about an ia64 instruction. --david --__--__-- Message: 5 From: Bjorn Helgaas <bjorn_helgaas@hp.com> To: alex_williamson@hp.com, Alex Williamson <alex_williamson@attbi.com>, linux-ia64@linuxia64.org Date: Fri, 9 May 2003 14:44:12 -0600 Subject: Re: [Linux-ia64] [PATCH] fix timer interrupts getting lost On Wednesday 23 April 2003 10:16 pm, Alex Williamson wrote: > > This patch fixes the issue of some CPUs not showing timer interrupts > going off. Seems during the process of sync'ing the itc, we jumped over > the next timer value. This patch is against 2.5.67 + ia64. I haven't > seen the problem on 2.4, but a quick looks seems like it's potentially > an issue there too. Thanks, I applied this for 2.4 also. Thanks! --__--__-- Message: 6 Date: Fri, 9 May 2003 14:43:22 -0700 From: "Luck, Tony" <tony.luck@intel.com> To: "Jesse Barnes" <jbarnes@sgi.com>, <davidm@hpl.hp.com> Cc: <linux-ia64@linuxia64.org> Subject: RE: [Linux-ia64] Re: [PATCH] head.S fix for unusual load addrs > Not that I can see--we've been using that method for awhile now with > good success, and I'd be happy to test any 2.5 patches that implement > this feature. So I guess we should go with virtual remapping? Tony? I started looking at porting the most recent version of my patch (last seen around 2.5.39 ... only has the relocation, but once that is it, adding kernel text replication is a relatively simple = evolutionary step). I've been teaching a class all morning, and part of the afternoon, so no demonstrable progress ... but most of the merge errors have been cleaned up. Now looking last (and biggest) reject in head.S. -Tony --__--__-- Message: 7 From: David Mosberger <davidm@napali.hpl.hp.com> Date: Fri, 9 May 2003 16:20:26 -0700 To: Bjorn Helgaas <bjorn_helgaas@HP.COM> Cc: linux-ia64@linuxia64.org Reply-To: davidm@hpl.hp.com Subject: Re: [Linux-ia64] [PATCH] 1/4 multi-ioport space support for 2.5 >>>>> On Thu, 24 Apr 2003 16:25:26 -0600, Bjorn Helgaas <bjorn_helgaas@HP.COM> said: Bjorn> 3 add support for /proc/iomem and /proc/ioports I'm suspecting this patch may be causing me some grief on a Big Sur. What happens is that the qla1280 is configured to use I/O space by default (no idea why that is the case, apart from a small buglet in reading the base address) and with the patch applied, it fails to get the range from 0x2000-0x20ff. I can work around the problem by using memory-mapped I/O. When I do that, /proc/ioports looks like this: $ cat /proc/ioports 00000000-000003af : PCI Bus 00:00 00000060-0000006f : i8042 00000170-00000177 : ide1 000001f0-000001f7 : ide0 00000376-00000376 : ide1 000003c0-000003df : vga+ 000003e0-00000cf7 : PCI Bus 00:00 000003f6-000003f6 : ide0 000003f8-000003ff : serial 00000d00-00000fff : PCI Bus 00:00 00001000-00001fff : PCI Bus 00:00 00001000-0000103f : eepro100 00001040-0000105f : uhci-hcd 00002000-00002000 : PCI Bus 00:01 00003000-0000ffff : PCI Bus 00:03 Perhaps the problem is that the reported range for Bus 00:01 is empty? Does this make any sense to you? Perhaps it's a firmware problem. --david --__--__-- Message: 8 From: David Mosberger <davidm@napali.hpl.hp.com> Date: Fri, 9 May 2003 16:31:29 -0700 To: Bjorn Helgaas <bjorn_helgaas@HP.COM>, linux-ia64@linuxia64.org Reply-To: davidm@hpl.hp.com Subject: Re: [Linux-ia64] [PATCH] 1/4 multi-ioport space support for 2.5 Oops, some more info: I missed the following boot-time error messages: PCI: Probing PCI hardware on bus (00:00) alloc 0x3b0-0x3df from PCI IO for PCI Bus 00:00 failed ACPI: PCI Interrupt Routing Table [\_SB_.PCI0._PRT] ACPI: PCI Root Bridge [PCI1] (00:01) PCI: Probing PCI hardware on bus (00:01) alloc 0x0-0x0 from PCI IO for PCI Bus 00:01 failed ACPI: PCI Interrupt Routing Table [\_SB_.PCI1._PRT] ACPI: PCI Root Bridge [PCI2] (00:02) PCI: Probing PCI hardware on bus (00:02) alloc 0x2000-0x2fff from PCI IO for PCI Bus 00:02 failed alloc 0x0-0x0 from PCI mem for PCI Bus 00:02 failed alloc 0x0-0x0 from PCI IO for PCI Bus 00:02 failed ACPI: PCI Interrupt Routing Table [\_SB_.PCI2._PRT] ACPI: PCI Root Bridge [PCI3] (00:03) PCI: Probing PCI hardware on bus (00:03) alloc 0xa0000-0xfffff from PCI mem for PCI Bus 00:03 failed alloc 0x3b0-0x3df from PCI IO for PCI Bus 00:03 failed Maybe it isn't a firmware problem, after all. --david --__--__-- Message: 9 Date: Sat, 10 May 2003 11:16:18 +0900 From: =?euc-kr?B?waQgwb7B2A==?= <CJJUNG@digitalhenge.com> To: <linux-ia64@linuxia64.org> Subject: [Linux-ia64] RE: Linux-IA64 digest, i want mailing list This is a multi-part message in MIME format. ------_=_NextPart_001_01C3169A.247BD218 Content-Type: text/plain; charset="euc-kr" Content-Transfer-Encoding: base64 IA0KDQoJLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0gDQoJRnJvbTogbGludXgtaWE2NC1yZXF1 ZXN0QGxpbnV4aWE2NC5vcmcgW21haWx0bzpsaW51eC1pYTY0LXJlcXVlc3RAbGludXhpYTY0Lm9y Z10gDQoJU2VudDogMjAwMy0wNS0xMCAoxeQpIL/AwPwgNDowMCANCglUbzogbGludXgtaWE2NEBs aW51eGlhNjQub3JnIA0KCUNjOiANCglTdWJqZWN0OiBMaW51eC1JQTY0IGRpZ2VzdCwgVm9sIDEg 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