Hi all, I am trying to test the software pipelining with the following code , ---------------------------------- int swp(int m,int *a,int *b){ int i; #pragma swp for (i=0; i<m ; i++) { b[i]=a[i]+1; } return i; } ------------------------------------ I expect , for better performence , the code should be compiled somewhat like this: ------------------------ mov ar.lc=r32 mov ar.ec=4 mov pr.rot=0x1000 loop: (p16) ld8 r35=[r9],8 (p18) add r37=r36,r0,1 (p19) st8 [r6]=r38,8 br.ctop loop;; ------------------------- but it seems the Intel compiler7.1 can not produce software pipelining for this code like what I expected . with -opt_report_file option , I got such tip: ----------------------------- Swp report for loop at line 6 in swp in file swp.c Modulo scheduling failed. Most likely, this was caused by loop-carried memory dependences. Following are the loop-carried memory dependence edges: Store at line 6 --> Load at line 6 ----------------------------- any advice ? Regards, Yiyang _________________________________________________________________ 与联机的朋友进行交流,请使用 MSN Messenger: http://messenger.msn.com/cnReceived on Sun Apr 20 02:40:29 2003
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