Notes and points about the IA64 Architecture, and common machines using the IA64 processor.
Talking to Firmware logging, power cycling, etc., via the serial port.
IA-64 TlbArchitecture
DecodingPSR scripts to help decode the PSR in those pesky OOOPS messages
ErrorLogs how to read, interpret and clear the error logs.
Serial Terminal how to install and run Linux using a serial terminal as the console.
Itanium Future Plans
(see http://news.com.com/2100-1006_3-5069915.html)
date |
chip |
Feature |
2002 |
McKinley |
|
2003 |
Madison |
6Mb L3 cache 1.5GHz |
2003 |
Deerfield |
Cheap! 1.5GHz, 1.5MB L2 cache, low power consumption |
2004 |
Madison II |
9Mb L3 cache |
2005 |
Montecito |
2-core |
2006 |
Tanglewood |
Multi-core (up to 16-way) |
Note:
- Montecito has been delayed, and is only now (Q3 2006) becoming readily available. Some of the features originally proposed for Montecito seem to have fallen off the map --- the independent power control of different parts of the chip, for instance.
- Deerfield never made much of an impact; It would have been nice for Blade servers and workstations; but almost everyone has got out of the Workstation Itanium business; and Blades are mostly coming with Madison chips as far as I can see.
